Mathematical operations on ARM-M4 lock when PWM interrupt is on

5

When I turn off the timer overflow interruption of PWM (+ - 15Khz) operations occur normally. But when it's turned on the processor gets lost in floating-point operations. I follow the debug in step mode but at some point the debug does not return and it is as if it were running just giving another pause that always falls in the described interrupt.

I'm using a K20 without Freescale FPU and I asked for it in the community but did not even call. I have already increased the Stack but nothing improved. I had the same problem with a S08PA , but this was just downloading the timer overflow (from 20Khz to 15Khz) that worked correctly.

Edit: Not really a firmware as I'm caught up in this problem. There is only interruption of PWM and routine to generate the Sine table.

// Gerador da tabela
void PWMInit(){

float a;
int i,r;

// Combine mode Pulse = CN+1 - CN
// Complementary mode : N+1 = Inv(N) 

Motor.DutyMax = FTM0_MOD - FTM0_CNTIN;
Motor.DutyZero = Motor.DutyMax >> 1;


Motor.Frequencia = 60;

Motor.MaxSamples = PWMFreq / Motor.Frequencia;
Motor.VMod = (Motor.DutyMax / 60) * Motor.Frequencia;
Motor.IncTabela = (float) 1000.0f / Motor.MaxSamples;
Motor.Div = (((long) MAXTABELA / Motor.VMod));
/*
for (i=0, a=0; i < Motor.MaxSamples; i++, a += Motor.IncTabela ) {
    r = SinT[(int)(a + 0.5f)];
    r = r / Motor.Div;
    r = Motor.DutyZero + r;
    TabelaGerada[i] =  (uint16_t) r;
}
*/
float ri = (2*PI) / Motor.MaxSamples;
float rr = 0;
for (i=0; i < Motor.MaxSamples; i++) {
    TabelaGerada[i] =  Motor.DutyZero * ((float) 1.0f + sin(rr));
    rr = rr + ri;
}

SetW(100);
SetV(500);
SetU(900);

FTM0_SYNC |= (FTM_SYNC_SWSYNC_MASK | (1 << 7)); 


}

// Interrupção
PE_ISR(EstouroDoTimerFTM0){
(void)(FTM0_SC == 0U);

Counter = 0;
}
    
asked by anonymous 08.04.2014 / 20:48

1 answer

1

I got it. It turns out that the Wizard Processor Expert did not disable the interruptions of the last two channels that were not used (engines only use 6 channels). Thus channels 6 and 7 were with channel match interrupts enabled and being triggered in undefined places.

    
10.04.2014 / 21:32