Interruptions operating system

2

Someone can explain this IDT [0x21] in the indexes of these structs

Why does 0x21 tell us?

struct IDT_entry IDT[IDT_SIZE];
unsigned long keyboard_address;
unsigned long idt_address;
unsigned long idt_ptr[2];

/* populate IDT entry of keyboard's interrupt */
keyboard_address = (unsigned long)keyboard_handler; 
IDT[0x21].offset_lowerbits = keyboard_address & 0xffff;
IDT[0x21].selector = 0x08; /* KERNEL_CODE_SEGMENT_OFFSET */
IDT[0x21].zero = 0;
IDT[0x21].type_attr = 0x8e; /* INTERRUPT_GATE */
IDT[0x21].offset_higherbits = (keyboard_address & 0xffff0000) >> 16;
    
asked by anonymous 14.12.2015 / 18:14

1 answer

2

Processors have two PICs ( Programmable Interrupt Controller ). The first one handles interrupts from IRQ0 to IRQ7, and the other handles IRQ8 through IRQ15.

The first uses the 0x20 port to Command (ICW) and 0x21 to Date . The second uses the 0xA0 and 0xA1 ports.

You're messing with keyboard interrupts (IRQ1), so you'll mess with the first PIC (command on the 0x20 port and data on the 0x21 port).

Update: I found this link, which explains well: link

    
14.12.2015 / 19:49