I'm studying computer architecture, and I'm very confused about the set of instructions for a processor. When we write something, for example, ADD A1, B1 , the processor sums the value of register A1 with B1 and stores the result in A1. But how and where is this instruction information stored? Are the instructions stored on the processor itself and inserted at the time of manufacture? For example, will a processor with CISC architecture always be CISC or can it be "reprogrammed" to be RISC?
Where are stored instructions for a processor?
2
asked by anonymous 23.10.2015 / 23:49
1 answer
5
However, how and where is this instruction information stored? Are the instructions stored in the processor itself and inserted at the time of manufacture?
The instructions are stored in memory, and searched through specific registers that normally take names such as data pointer , stack pointer , instruction pointer in>, among others. In these registers values are stored that correspond to memory addresses from where the instructions are searched, and the execution of these same instructions update their values so that they point to the next instruction to be executed. In this way, the processor uses these registers to fetch in memory the next instruction to execute.
Access to main memory is slow, but as these instructions will be accessed multiple times in sequence, then due to the spatial and temporal locale principle of instructions and memory, most of these instructions will be located in the L1 cache. / p> Assuming that the register pointing to the next statement is called instruction pointer , then the process of updating the value of these registers may consist of:
- instruction pointer
-
In case of calling routines, store the subsequent statement to return in memory, in a position defined by a register that contains the address of a stack pointer store the address of the first statement of the invoked routine in the instruction pointer , and when the subroutine terminates through the stack pointer , the value of the subsequent statement is assigned to instruction pointer .
Only increment the value of instruction pointer to catch the subsequent statement or;
For example, will a processor with CISC architecture always be CISC or can it be "reprogrammed" to be RISC?
No, it can not be rescheduled. The RISC or CISC architecture corresponds to the internal design of the physical processor, being directly related to the number and organization of the electronic nanocomponents (composed almost exclusively of logic gates and flip-flops, which in turn are composed of transistors) / p>
The main difference between RISC and CISC is the number and complexity of the instructions they are able to interpret. The CISC follows the idea that the processor should be able to decode a large number of different instructions, perhaps in various formats, in order to become powerful and sophisticated. The RISC follows the idea that the set of instructions should be minimal and all of them have the same or almost the same format, making it much simpler.
There is also a RISC and CISC hybrid architecture that although it is a CISC instruction processor, internally it corresponds to a RISC processor interpreting a fixed set of CISC instructions, where each CISC instruction is translated into a sequence of RISC instructions. Such a set of instructions that translates from CISC to RISC is called microcode.
Microcode is the only code that is written inside the hybrid RISC / CISC processor as part of its electronic circuit in the form of a series of flip-flops. Since the microcode is written as part of the processor's electronic microcircuit, it can not be changed.
24.10.2015 / 08:50